SanDiegoRecruiter Since 2001
the smart solution for San Diego jobs

ASIC Engineering Technical Leader - Design Verification

Company: Cisco
Location: San Diego
Posted on: March 20, 2023

Job Description:

What You'll Do

Cisco COG team is looking for an expert and versatile Senior ASIC Design Engineer. You will have an ASIC design background with experience in design, physical design, post silicon validation, with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.

The role expects you to be specifically responsible for the Design and Static Verification of the chip, which includes :

  • Static Timing Analysis, developing Timing Constraints, understanding the top-level design and vendor IPs/PLLs/Serdes/PHY Macros and all aspects of timing modes including(design for testing) DFT timing.
  • Analysis of cross clock domain paths at Full chip level and experience with CDC analysis tools.
  • Drive the Formal verification flow including Logic Equivalence Check (LEC) flow using Formal tools like Formality or other equivalent tools .
  • Document and improve methodologies to make product successful.
  • Design and verify of SoC ASIC.
  • Work closely with the physical back-end team on synthesis, DFT, STA.

    Who You'll Work With

    You will be working with a dedicated and energetic team of enthusiastic engineers in an environment where team members experience mutual enhancement and improvement.

    In terms of design responsibilities, you will be working with our system team for Micro architecture define, design implementation, and design verification, and with our backend team for chip integration and verification.

    Who You Are

    • Worked in micro-architecture and design of high-scale, high-performance ASICs.
    • Validated experience in implementation: specification, design, formal verification, system testing.
    • Validated experience in physical design aspects: timing analysis and closure, CDC analysis, power/area optimizations, macro size/placement analysis.
    • Validated experience in flow automation (scripting, Makefiles, etc), and establishing guidelines for the team.
    • Experience with expertise in the digital SOC COT design flow based on the advanced technology nodes(e.g. 7nm,5nm CMOS).
    • Expertise in chip integration, including chip floor planning, synthesis, DFT.
    • Expertise in verification, including function verification, formal verification, and gate-level verification
    • Knowledge of SV/UVM based verification.
    • In depth knowledge of generic digital logic design, such as FIFO, FSM, cross-clock domain logics.
    • Strong scripting, debugging and problem solving skills.

      Minimum Qualifications

      • BS/MS in Electrical Engineering
      • 8+ working experience in the field of digital ASIC Design
      • Understands all aspects of implementation: specification, design, timing-closure, power-optimization, and flow automation.
      • Experienced in system debug and SW/HW bringup.
      • RTL and Synthesis experience.
      • Synthesis and Block/Full chip STA constraints and Timing analysis
      • Experience with PrimeTime and Spyglass CDC (or equivalent tools)
      • End-to-end design experience from Verilog to gates, block planning, area/timing closure is helpful.
      • Programming/scripting skills (C, Perl)
      • Good written/verbal interpersonal skills and leadership skills.
        Why Cisco?

        #WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!

        Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We're helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.

        We tackle whatever challenges come our way. We have each other's backs, we recognise our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).

        We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.

        So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco

        Message to applicants applying to work in the U.S.:

        When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.

        U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings. Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday, plus a day off for their birthday. Employees accrue up to 20 days of Paid Time Off (PTO) each year and have access to paid time away to deal with critical or emergency issues without tapping into their PTO. We offer additional paid time to volunteer and give back to the community. Employees are also able to purchase company stock through our Employee Stock Purchase Program.

        Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco pays at the standard rate of 1% of incentive target for each 1% revenue attainment against the quota up to 100%. Once performance exceeds 100% quota attainment, incentive rates may increase up to five times the standard rate with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

Keywords: Cisco, San Diego , ASIC Engineering Technical Leader - Design Verification, IT / Software / Systems , San Diego, California

Click here to apply!

Didn't find what you're looking for? Search again!

I'm looking for
in category

Log In or Create An Account

Get the latest California jobs by following @recnetCA on Twitter!

San Diego RSS job feeds