ASIC Engineering Technical Leader - DSP Design and Verification

Company: Cisco
Location: San Diego
Posted on: May 28, 2023

Job Description:

What You'll Do
Cisco COG team is looking for an expert and dedicated Senior ASIC Design Engineer with a concentration in hardware DSP design and verification. You will have an ASIC design background with direct experience in design, physical design, post silicon validation, with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.
The role expects you to be specifically responsible for the Design and Static Verification of the chip, which includes :

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  Design and verification of several assigned block level DSP digital RTL designs
  
  
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  Design, verify, and VLSI implementation of various high speed digital PHY communication blocks.
  
  
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  Work closely with the PHY system team to co-verify DSP blocks.
  
  
  Who You'll Work With
  You will be working with a versatile and upbeat team of enthusiastic engineers in an environment where team members experience mutual enhancement and improvement.
  In terms of design responsibilities, you will be working with our system team for Micro architecture define, design implementation, and design verification, and with our backend team for chip integration and verification.
  Who You Are
  
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    Domain level experience and expertise in the design and high speed implementation of communication data path DSP blocks, such as digital adaptive equalizer, digital timing recovery unit, Automatic Gain Control(AGC), and Forward Error Correction(FEC) (e.g. block codes (BCH/RS), and convolutional codes)
    
    
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    General high level proficiency with modern system design tools and languages (e.g. C++/C, SystemVerilog, Perl)
    
    
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    Expertise in co-verifying complex DSP blocks.
    
    
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    In depth knowledge of data path synthesis, especially in advanced technology nodes (e.g. 7nm,5nm CMOS)
    
    
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    Knowledge of high speed arithmetic implementation.
    
    
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    SV/UVM based verification skill a plus
    
    
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    Strong analytical, debugging and problem solving skills.
    
    
    Minimum Qualifications:
    
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      MS/PhD in Electrical Engineering
      
      
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      5+ working experience in the field of digital DSP ASIC design
      
      
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      Understands all aspects of implementation: specification, design, timing-closure, power-optimization, and flow automation.
      
      
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      Experienced in system debug and SW/HW bring up, system validation of silicon towards FCS.
      
      
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      RTL and Synthesis experience.
      
      
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      Synthesis and Block/Full chip STA constraints and Timing analysis
      
      
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      Experience with PrimeTime and Spyglass CDC (or equivalent tools)
      
      
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      End-to-end design experience from Verilog to gates, block planning, area/timing closure is helpful.
      
      
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      Programming/scripting skills (C, Matlab, Perl)
      
      
      Why Cisco?
      #WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!
      Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We're helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.
      We tackle whatever challenges come our way. We have each other's backs, we recognise our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
      We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.
      So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco
      Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
      Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.

Keywords: Cisco, San Diego , ASIC Engineering Technical Leader - DSP Design and Verification, IT / Software / Systems , San Diego, California