ASIC Engineering Technical Leader - DSP Design and Verification
Location: San Diego
Posted on: May 28, 2023
What You'll Do
Cisco COG team is looking for an expert and dedicated Senior ASIC Design Engineer with a concentration in hardware DSP design and verification. You will have an ASIC design background with direct experience in design, physical design, post silicon validation, with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.
The role expects you to be specifically responsible for the Design and Static Verification of the chip, which includes :
Design and verification of several assigned block level DSP digital RTL designs
Design, verify, and VLSI implementation of various high speed digital PHY communication blocks.
Work closely with the PHY system team to co-verify DSP blocks.
Who You'll Work With
You will be working with a versatile and upbeat team of enthusiastic engineers in an environment where team members experience mutual enhancement and improvement.
In terms of design responsibilities, you will be working with our system team for Micro architecture define, design implementation, and design verification, and with our backend team for chip integration and verification.
Who You Are
Domain level experience and expertise in the design and high speed implementation of communication data path DSP blocks, such as digital adaptive equalizer, digital timing recovery unit, Automatic Gain Control(AGC), and Forward Error Correction(FEC) (e.g. block codes (BCH/RS), and convolutional codes)
General high level proficiency with modern system design tools and languages (e.g. C++/C, SystemVerilog, Perl)
Expertise in co-verifying complex DSP blocks.
In depth knowledge of data path synthesis, especially in advanced technology nodes (e.g. 7nm,5nm CMOS)
Knowledge of high speed arithmetic implementation.
SV/UVM based verification skill a plus
Strong analytical, debugging and problem solving skills.
MS/PhD in Electrical Engineering
5+ working experience in the field of digital DSP ASIC design
Understands all aspects of implementation: specification, design, timing-closure, power-optimization, and flow automation.
Experienced in system debug and SW/HW bring up, system validation of silicon towards FCS.
RTL and Synthesis experience.
Synthesis and Block/Full chip STA constraints and Timing analysis
Experience with PrimeTime and Spyglass CDC (or equivalent tools)
End-to-end design experience from Verilog to gates, block planning, area/timing closure is helpful.
Programming/scripting skills (C, Matlab, Perl)
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Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
What You'll Do
Keywords: Cisco, San Diego , ASIC Engineering Technical Leader - DSP Design and Verification, IT / Software / Systems , San Diego, California
here to apply!